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Updates found with 'energy sources'

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Updates found with 'energy sources'

IEEE 2016 - 2017 Vlsi Titles1. Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators2. Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications.3. A High-Throughput Energy-Efficient Implementation of Successive Cancellation Decoder for Polar Codes Using Combinational Logic4. Adaptive Multibit Crosstalk-Aware Error Control Coding Scheme for On-Chip Communication5. A Method to Design Single Error Correction Codes With Fast Decoding for a Subset of Critical Bits6. Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design7. CORDIC II: A New Improved CORDIC Algorithm8. Low-Power Parallel Chien Search Architecture Using a Two-Step Approach9. Efficient Circuit for Parallel Bit Reversal .10. High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels11. Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication12. A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications13. Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems14. Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures15. One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements 16. Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis17. A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes18. A Novel Quantum-Dot Cellular Automata X-bit × 32-bit SRAM19. Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding20. Ultralow-Energy Variation-Aware Design: Adder Architecture Study21. SRAM-Based Unique Chip Identifier Techniques .22. Implementing Minimum-Energy-Point Systems With Adaptive Logic23. On Efficient Retiming of Fixed-Point Circuits24. Hardware and Energy-Efficient Stochastic LU Decomposition Scheme for MIMO Receivers25. Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip26. Concept, Design, and Implementation of Reconfigurable CORDIC27. A New CDMA Encoding/Decoding Method for on-Chip Communication Network
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IEEE 2016 - 2017 VLSI Project Titles 1. Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators2. Hypergraph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications.3. A High-Throughput Energy-Efficient Implementation of Successive Cancellation Decoder for Polar Codes Using Combinational Logic4. Adaptive Multibit Crosstalk-Aware Error Control Coding Scheme for On-Chip Communication5. A Method to Design Single Error Correction Codes With Fast Decoding for a Subset of Critical Bits6. Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design7. CORDIC II: A New Improved CORDIC Algorithm8. Low-Power Parallel Chien Search Architecture Using a Two-Step Approach9. Efficient Circuit for Parallel Bit Reversal .10. High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels11. Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication12. A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications13. Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems14. Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures15. One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements 16. Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis17. A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes18. A Novel Quantum-Dot Cellular Automata X-bit × 32-bit SRAM19. Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding20. Ultralow-Energy Variation-Aware Design: Adder Architecture Study21. SRAM-Based Unique Chip Identifier Techniques .22. Implementing Minimum-Energy-Point Systems With Adaptive Logic23. On Efficient Retiming of Fixed-Point Circuits24. Hardware and Energy-Efficient Stochastic LU Decomposition Scheme for MIMO Receivers25. Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip26. Concept, Design, and Implementation of Reconfigurable CORDIC27. A New CDMA Encoding/Decoding Method for on-Chip Communication Network
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VLSI PROJECTS ABSTRACT 2016-2017 HIGH-SPEED AND ENERGY-EFFICIENT CARRY SKIP ADDER OPERATING UNDER A WIDE RANGE OF SUPPLY VOLTAGE LEVELS ABSTRACT: In this paper, we present a carry skip adder (CSKA) structure that has a higher speed yet lower energy consumption compared with the conventional one. The speed enhancement is achieved by applying concatenation and incrementation schemes to improve the efficiency of the conventional CSKA (Conv-CSKA) structure. In addition, instead of utilizing multiplexer logic, the proposed structure makes use of AND-OR-Invert (AOI) and OR-AND-Invert (OAI) compound gates for the skip logic. The structure may be realized with both fixed stage size and variable stage size styles, wherein the latter further improves the speed and energy parameters of the adder. Finally, a hybrid variable latency extension of the proposed structure, which lowers the power consumption without considerably impacting the speed, is presented. This extension utilizes a modified parallel structure for increasing the slack time, and hence, enabling further voltage reduction. The proposed structures are assessed by comparing their speed, power, and energy parameters with those of other adders using a 45-nm static CMOS technology for a wide range of supply voltages. The results that are obtained using HSPICE simulations reveal, on average, 44% and 38% improvements in the delay and energy, respectively, compared with those of the Conv-CSKA. In addition, the power–delay product was the lowest among the structures considered in this paper, while its energy–delay product was almost the same as that of the Kogge–Stone parallel prefix adder with considerably smaller area and power consumption. Simulations on the proposed hybrid variable latency CSKA reveal reduction in the power consumption compared with the latest works in this field while having a reasonably high speed.
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IEEE 2016 -2017 Embedded System Projects TitlesS.No Project Title Code1. Coexistence of ZigBee-Based WBAN and Wi-Fi for Health Telemonitoring Systems Wireless2. A Novel Wireless Multifunctional Electronic Current Transformer based on ZigBee-based Communication Wireless3. Configurable ZigBee-based control system for people with multiple disabilities in smart homes Wireless4. ZigBee network system for observing operating activities of work vehicles Wireless5. Interference-Mitigated ZigBee-Based Advanced Metering Infrastructure Wireless6. A Mobile ZigBee Module in a Traffic Control System ` Wireless7. Energy Efficient Outdoor Light Monitoring and Control Architecture Using Embedded System Wireless8. Low-power wearable ECG monitoring system for multiple-patient remote monitoring Wireless9. Energy-Efficient Intelligent Street Lighting System Using Traffic-Adaptive Control Wireless10. Development of a distributed disaster data and human life sign probe system Wireless11. Design and implementation of a home automation system for smart grid applications Wireless12. Milk products monitoring system with arm processor for early detection of microbial activity ARM13. Micro grid demonstration gateway for players communication and load monitoring and management Wireless14. WiFACT -- Wireless Fingerprinting Automated Continuous Training Wireless15. Lightweight Mashup Middleware for Coal Mine Safety Monitoring and Control Automation Wireless16. A smart wearable system for sudden infant death syndrome monitoring General17. Exoskeleton robots for upper-limb rehabilitation Robotics18. Wearable Camera- and Accelerometer-Based Fall Detection on Portable Devices GSM & GPS19. Innovation in Underwater Robots: Biologically Inspired Swimming Snake Robots Robotics20. GPS based autonomous vehicle navigation and control system GSM & GPS21. Real-Time Driving Monitor System: Combined Cloud Database with GPS IoT22. AgriSys: A smart and ubiquitous controlled-environment agriculture system IoT23. Building Smart Cities Applications using IoT andCloud-based Architectures IoT24. An IoT-based system for collision detection on guardrails IoT25. A vision-based teleoperation method for a robotic arm with 4 degrees of freedom Robotics26. Gesture control of drone using a motion controller Robotics27. Development of the Mobile Robot with a Robot Arm Robotics28. Milk products monitoring system with arm processor for early detection of microbial activity ARM29. Controller Area Network Assisted Grid Synchronization of a Microgrid With Renewable Energy Sources and Storage Electrical30. A Real-Time Embedded System for Monitoring of Cargo Vehicles, Using Controller Area Network (CAN) CAN31. Wireless biosensing network for drivers' health monitoring Biomedical32. Android4Auto: A proposal for integration of Android in vehicle infotainment systems Android33. A pulse measurement and data management system based on Arduino platform and Android device Android34. Remote control and instrumentation of Android devices Android35. “AUTOBOOK” The Messaging Machines (Using GSM and Arduino) Arduino36. Tracking and Theft Prevention System for Two Wheeler Using GSM and GPS GSM & GPS37. Bank Locker Security System Using RFID and GSM Technology GSM38. Design of Entrapment Escalation using GSM for Elevators GSM39. Distribution Line Fault Detection & GSM Module Based Fault Signaling System Electrical40. GSM & PIR Based Advanced Antitheft Security System Security 41. LPG Gas Weight and Leakage Detection System Using GSM GSM42. Android Based Women Tracking System Using GPS and GSM GSM & GPS43. Trespass Prevention System Using IOT IoT44. Automatic Vehicle Accident Detection and Rescue System GSM & GPS45. Design and Implementation of Integrated Mobile Operated Remote Vehicle IoT46. A Wearable Device for Continuous Detection and Screening of Epilepsy during Daily Life IoT47. Review of Automatic Detection and control of Disease for Grape Field Gen48. Environmental Condition Monitoring System for the Industries Gen49. Security Management Access Control System Gen50. Design and Development of Embedded based System for Monitoring Industrial and Environmental Parameters for Analyzing the Health of Human beings Gen51. Visual Surveillance Using Absolute Difference Motion Detection System Raspberry pi52. Automatic Irrigation System Using Internet of Things IoT53. Design of Embedded Irrigation System by Using WSN Wireless54. Vehicle Accident Prevention Using Assistant Braking System Gen55. Smart Transport Database Management System Gen56. Accident Alert Using ZIGBEE and GPS Wireless57. Controlling the Home Appliances Remotely Through Web Application Using ZIGBEE Wireless58. An optimized solar traffic control and alert system using wireless sensor networks Wireless59. Biometric Recognition Technique for ATM System Security60. Light Weight Access Control System for Constrained IOT Devices IoT61. Design of Prototype Model for Home Automation Using Wireless Sensor Networks Wireless62. Automated Sensor Network For Monitoring and Detection of Impurity In Drinking Water System General63. Automated Smart Trolley with Smart Billing Using Arduino Gene64. Embedded Automatic Vehicle Control System Using Voice Recognition On ARM 7 Processor ARM65. Embedded Voice Controlled Computer For Visually Impaired and Physically Disabled People Using Arm Processor ARM66. Implementation of Embedded Web Server Using TCP/IP Protocol with Raspberry PI Raspberry PI67. Designing of Cleaning Robot Robot68. An Analysis of Network-Based Control System Using Controller Area Network (CAN) Protocol CAN69. Identify the Deterioration in Pipe by Using Wheel Operated Robot Robot70. RFID -G Based Navigation System For Visually Impaired To Work at Industry Gen71. New Generation ATM Terminal Services NFC72. A Wireless Sensor Interface for the Quantification of Tremor Using Off the Shelf Components Wireless73. Design and Implementation of Low-Cost SMS Based Monitoring System of Distribution Transformers GSM74. An Integrated Cloud-Based Smart Home Management System with Community Hierarchy Automation75. Home Outlet and LED Array Lamp Controlled by a Smartphone with a Hand Gesture Recognition Gesture76. Low-power wearable ECG monitoring system for multiple-patient remote monitoring Bio-medical77. Smart Real-Time Healthcare Monitoring and Tracking System using GSM/GPS Technologies Bio-medical78. The Design of Building Fire Monitoring System Based on ZigBee-WiFi Networks Wireless
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IEEE 2016 - 2017 Power Electronics and Power Systems Titles1) Investigation of Negative-Sequence Injection Capability of Cascaded H-Bridge Converters in Star and Delta Configuration2) A Novel Control for a Cascaded Buck Boost PFC Converter Operating in Discontinuous Capacitor Voltage Mode3) A Single-Phase Buck-Boost Matrix Converter with Only Six Switches and Without Commutation Problem4) Adaptive Neuro Fuzzy Inference System Least Mean Square Based Control Algorithm for DSTATCOM5) Average-Value Model of Modular Multilevel Converters Considering Capacitor Voltage Ripple6) LMF Based Control Algorithm for Single Stage Three-Phase Grid Integrated Solar PV System7) Analysis of bi-directional piezoelectric-based converters for zero-voltage switching operation8) A Multi-Level Converter with a Floating Bridge for Open-Ended Winding Motor Drive Applications9) Variable Duty Cycle Control for Quadratic Boost PFC Converter10) Pulse Pattern Modulated Strategy for Harmonic Current Components Reduction in Three-Phase AC-DC Converters11) Practical Layouts and DC-Rail Voltage Clamping Techniques of Z-Source Inverters12) A Low Capacitance Cascaded H-Bridge Multi-Level StatCom13) Impedance networks and its Application in Power for Electric Traction Systems14) Phase Current Balance Control Using DC-Link Current Sensor for Multi-Phase Converters with Discontinuous Current Mode Considered 15) Efficient Single Phase Transformerless Inverter for Grid-Tied PVG System With Reactive Power Control16) Single-Stage High Power Factor Converters Requiring Low DC-Link Capacitance to Drive Power LEDs17) High Efficiency Bi-Directional Converter for Flywheel Energy Storage Application18) Z-Source Resonant Converter with Power Factor Correction for Wireless Power Transfer Applications19) Design of External Inductor for Improving Performance of Voltage Controlled DSTATCOM20) A Single-Switch AC-DC LED Driver Based on a Boost-Flyback PFC Converter with Lossless Snubber21) Control and Analysis of the Modular Multilevel DC De-Icer with STATCOM Functionality22) Combined Phase Shift and Frequency Modulation of a Dual Active Bridge AC-DC Converter with PFC23) Least Power Point Tracking Method for Photovoltaic Differential Power Processing Systems24) Experimental Investigation on a Hybrid Series Active Power Compensator to Improve Power Quality of Typical Households25) Soft Start and Voltage Control of Induction Motors using Floating Capacitor Hbridge Converters26) High Performance Predictive Control of Quasi Impedance Source Inverter27) Analysis of the Integrated SEPIC-Flyback Converter as a Single-Stage Single-Switch Power-Factor-Correction LED Driver28) Matrix Converter Based Active Distribution Transformer29) Universal AC Input High Density Power Adapter Design with a Clamped Series Resonant30) SVM Strategies for Common-Mode Current Reduction in Transformerless Current-Source Drives at Low Modulation Index31) A Single-stage High Frequency Resonant AC/AC Converter32) Analysis and Control of Neutral-Point Voltage for Transformerless Three-Level PV Inverter in LVRT Operation33) A Hybrid-STATCOM with Wide Compensation Range and Low DC-Link Voltage34) A Single-Stage Single-Switch LED Driver Based on Class-E Converter35) Impedance Coordinative Control for Cascaded Converter in Bidirectional Application36) A DC-voltage Controlled Variable Capacitor for Stabilizing the ZVS Frequency of a Resonant Converter for Wireless Power Transfer37) Combined LMS-LMF Based Control Algorithm of DSTATCOM for Power Quality Enhancement in Distribution System38) Interleaved SEPIC Power Factor Pre-Regulator Using Coupled Inductors in Discontinuous Conduction Mode with Wide Output Voltage39) Model Predictive Control Scheme of Five-Leg AC-DC-AC Converter-Fed Induction Motor Drive40) A Virtual RLC Damper to Stabilize DC/DC Converters Having an LC Input Filter while Improving the Filter Performance41) Synchronous Power Controller with Flexible Droop Characteristics for Renewable Power Generation Systems42) A Buck Power Factor Correction Converter with Predictive Quadratic Sinusoidal Current Modulation and Line Voltage Reconstruction43) A Real-time Variable Turn-off Current Strategy for PFC Converter with Voltage Spike Limitation and Efficiency Improvement44) A Common Grounded Z-Source DC-DC Converter with High Voltage Gain45) A Digital Predictive Current Mode Controller for Single Phase High Frequency Transformer Isolated Dual Active Bridge DC to DC Converter46) A High-Voltage Compliant Current-to-Digital Sensor for DC-DC Converters in Standard CMOS Technology47) A New Single-Switch Isolated High-Gain Hybrid Boosting Converter48) A Novel Approach to Generate Effective Carrier-Based Pulsewidth Modulation Strategies for Diode-Clamped Multilevel DC-AC Converters49) A Novel Medium-Voltage Modular Multilevel DC-DC Converter50) A PWM Plus Phase-Shift Controlled Interleaved Isolated Boost Converter Based on Semi-Active Quadrupler Rectifier for High Step-Up Applications51) Analysis and Design of Current-Fed High Step Up PWM Controlled Quasi-Resonant DC-DC Converter for Fuel Cell Applications52) Analysis and Implementation of a Non-Isolated Bidirectional DC-DC Converter with High Voltage Gain53) Capacitor Aging Detection in DC-DC Converter Output Stage54) Derivation of Dual-Switch Step-Down DC/DC Converters with Fault-Tolerant Capability55) Design and Analysis of a High Efficiency DCDC Converter with Soft Switching Capability for Renewable Energy Applications Requiring High Voltage Gain56) Design and Steady State Analysis of Parallel Resonant DC-DC Converter for High Voltage Power Generator57) Digital Control of a High Voltage (2.5 kV) Bidirectional DC-DC Flyback Converter for Driving a Capacitive Incremental Actuator58) Downsizing Effects of Integrated Magnetic Components in High Power Density DC-DC Converters for EV and HEV59) Effective Voltage Balance Control for Bipolar-DC-Bus Fed EV Charging Station with Three-Level DC-DC Fast Charger60) Feed-Forward based Control in a DC-DC Converter of Asymmetric Multistage Stacked Boost Architecture61) High Step-Up/Step-Down Soft-Switching Bidirectional DC-DC Converter with Coupled-Inductor and Voltage Matching Control for Energy Storage Systems62) High-Efficiency Asymmetric Forward-Fly back Converter for Wide Output Power Range63) Isolated Double Step-down DC-DC Converter with Improved ZVS Range and No Transformer Saturation Problem64) Minimum-Current-Stress Scheme of Dual Active Bridge DC-DC Converter with Unified-phase-shift Control65) Model Predictive Control of Capacitor Voltage Balancing for Cascaded Modular DC-DC Converters66) Model Predictive Voltage Control for Single Inductor Multiple-Output DC-DC Converter with Reduced Cross Regulation67) Parasitics Assisted Soft-switching and Secondary Modulated Snubberless Clamping Current-fed Bidirectional Voltage Doubler for Fuel Cell Vehicles68) Stability Analysis and Stabilization methods of DC Microgrid with Multiple Parallel-Connected DC-DC Converters loaded by CPLs69) Steady-State Analysis of Inductor Conduction Modes in the Quadratic Boost Converter70) Suppression of the Peak Harmonics from Loads by Using a Variable Capacitance Filter in Low-Voltage DC/DC Converters71) Topology Derivation and Generalized Analysis of Zero-Voltage-Switching Synchronous DC-DC Converters with Coupled Inductors72) Unified Triple-Phase-Shift Control to Minimize Current Stress and Achieve Full Soft Switching of Isolated Bidirectional DC-DC Converter73) A New Transformerless Buck-Boost Converter With Positive Output Voltage74) Derivation of Dual-Switch Step-Down DC/DC Converters with Fault-Tolerant Capability75) Digital Sensorless Current Mode Control Based on Charge Balance Principle and Dual Current Error Compensation for DC–DC Converters in DCM
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VLSI PROJECTS ABSTRACT 2016 -2017LOW-POWER SYSTEMS FOR DETECTION OF SYMPTOMATIC PATTERNS IN AUDIO BIOLOGICAL SIGNALSABSTRACT: In this paper, we present a low-power, efficacious, and scalable system for the detection of symptomatic patterns in biological audio signals. The digital audio recordings of various symptoms, such as cough, sneeze, and so on, are spectrally analyzed using a discrete wavelet transform. Subsequently, we use simple mathematical metrics, such as energy, quasi-average, and coastline parameter for various wavelet coefficients of interest depending on the type of pattern to be detected. Furthermore, a mel-frequency cepstrum-based analysis is applied to distinguish between signals, such as cough and sneeze, which have a similar frequency response and, hence, occur in common wavelet coefficients. Algorithm-circuit codesign methodology is utilized in order to optimize the system at algorithm and circuit levels of design abstraction. This helps in implementing a low-power system as well as maintaining the efficacy of detection. The system is scalable in terms of user specificity as well as the type of signal to be analyzed for an audio symptomatic pattern. We utilize multiplierless implementation circuit strategies and the algorithmic modification of mel cepstrum computation to implement low power system in the 65-nm bulk Si technology. It is observed that the pattern detection system achieves about 90% correct classification of five types of audio health symptoms. We also scale the supply voltage due to lower frequency of operation and report a total power consumption of ~184 µW at 700 mV supply.
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VLSI PROJECTS ABSTRACT 2016-2017 A PERFORMANCE DEGRADATION TOLERABLE CACHE DESIGN BY EXPLOITING MEMORY HIERARCHIES ABSTRACT: Performance degradation tolerance (PDT) has been shown to be able to effectively improve the yield, reliability, and lifetime of an electronic product. The focus of PDT is on the particular performance degrading faults (pdef) that only incur some performance degradation of a system without inducing any computation errors. The basic idea is that as long as the defective chips containing only the pdef can provide acceptable performance for some applications, they may still be marketable. Critical issues of PDT to be addressed include the portion of the pdef in a faulty chip and their induced performance degradation. For a typical cache design, most of the possible faults are not pdef. In this brief, we propose a cache redesign method, called PDT cache, where all functional faults in the data-storage cells of a cache (major part of the cache) can be transformed into pdef. By transforming this large number of faults into pdef, a faulty cache becomes much more likely to be still marketable. The proposed design exploits the existing hardware resources and the inherent error resilience scheme to reduce the incurred hardware overhead. The logic synthesis results show that the incurred hardware overhead is only 6.29% for a 32-kB cache. We also evaluate the induced performance degradation under various fault densities using the CPU2000 and CPU2006 benchmark programs. The results show that for a 32-kB cache design, when the fault density is <1%, only 0.31% performance degradation is incurred. In addition, the scalability of the PDT cache is also evaluated. The results show that a smaller hardware overhead is required for a larger cache, and the performance degradation is independent of the cache associativity and can even be smaller for a
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